1. Technical Field
The present invention relates to injecting and detecting simulation only packets within a simulation environment during a connection discovery process in order to automatically compute connection latency times and program interconnect configuration registers accordingly.
2. Description of the Related Art
A multi-chip Symmetric Multiprocessing (SMP) computer system utilizes an SMP device interconnect (fabric) bus to transfer commands and data between each device within the system. Each device includes a set of fabric configuration registers, which defines the manner in which the system's devices are interconnected.
When simulating an SMP system, a simulation program must accurately program all fabric configuration registers and maintain a database of all connections between devices in order to perform proper end-to-end tests, which includes address and data path transmission delay settings between devices and nodes. Each time a system configuration changes or a developer adds a new configuration, the developer must update the simulation program with delay values that are specific to the new model configuration.